Tactyle 2.0 key enhancements: • 4 x speed increase over Tactyle 1.x – benchmarks now show an average speed improvement of approximately 300x over standard VerilogA simulations. • RF option, seamlessly allowing the efficient simulation of systems involving signals with widely differing frequency components, such as baseband modulation of an RF carrier. • SC option, allowing Tactyle 2.0 to interface to a System C environment in order to, for example, co-simulate large digital systems in System C (such as processors, modulators, demodulators) with an Analog/Mixed-Signal sub-system in Tactyle 2.0. • Improved support for buses, facilitating the capture of the digital portion of the Design Under Test. • Full support for double and int data types, and also for the integration and derivative operations. • Extensions to the Tactyle library, including a transformer, new analog-to-digital conversion components, and extra controlled sources.

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