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来源:LM317 Electronics Components编辑:FCI Electronics时间:2021-06-15 14:35:58

FPGAs, of course, are fully fabricated, so no NRE fees have to be paid to FPGA suppliers. That makes FPGAs and their structured-ASIC cousins look more cost-effective than custom ASICs for low to moderate production quantities. But custom ASICs, promising lower chip costs when high production volumes are needed, pull designers in the other direction. Custom solutions can often deliver higher performance and consume less power than an FPGA or structured-ASIC equivalent.

Because portable electronics applications demand small size and low profile, the supply must operate at sufficiently high frequency to reduce the size of external filter components. Additionally, a single dc/dc controller generating three outputs is highly desirable, since it contains the cost of the solution and minimizes the pc-board area required.

The circuit, Figure 1 , uses a boost regulator and charge-pump combination circuitry to accomplish the task.

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Boost regulator : The circuit employs a single dc/dc controller (A8483, a current-mode-controlled boost regulator) to generate a +8.75-V main supply, capable of delivering up to 50 mA. (Selecting the appropriate feedback voltage divider can change the desired output voltage.) The 1.2-MHz operating frequency reduces the inductor size and allows operation with tiny ceramic capacitors.

Internal compensation simplifies circuit design and reduces external component count. The 0.75-mm low-profile MLP/TDFN package allows the boost regulator to be mounted on either side of the PCB to optimize footprint and minimize height.

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Positive and negative charge pumps : When the internal switch of A8483 is ON, the SW node is near 0 V, with low impedance to circuit ground. When the internal switch of A8483 switches OFF to provide boost action, the SW node goes up to approximately 9.05 V. This operation allows for an easy implementation of charge pump with diodes and capacitors, to generate gate-drive supplies at +15 V and -7.5 V with 1-mA output-current capability. The circuit shows optional Zener diodes across gate-driver outputs to provide overvoltage protection.

Additional sequencing features can be added to this solution as needed, by providing series pass elements in series with the outputs.

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About the author Mark Gaboriault is a strategic marketing manager in the Power Management Business Unit at Allegro Microsystems, Inc.

Editor's note : This Design Note appeared in Planet Analog , the EE Times Magazine Supplement, April 24, 2006. The schematic in the print version had a small error; capacitor C10 was replaced by a short circuit. We apologize for the error. Bill Schweber

By Richard Lucquet, director of the Sytems Application Group at Micronas USA (formerly WISchip international Ltd.);

As package sizes continue to shrink and system complexity continues to increase with greater number of devices on the system, thermal management becomes a crucial concern for a system designer.

The number of devices in the system along with the higher frequencies, results in substantial heat generation. Higher power consumption results in higher heat generation, which must be dissipated to maintain operating temperatures within specifications. The steps taken by the system designer for proper management of heat on the system is commonly referred to as thermal management. Proper thermal management improves product performance, reliability, and life expectancy of the devices.

Thermal management becomes critical due to the following factors:

Thermal management includes understanding device performance, placement of the devices on the board, and cooling requirements. All of these factors result in an increased demand for thermal data for system designers.

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